CDB42L55
Evaluation Board for CS42L55
Features
Line-level Analog Inputs
– 4 RCA Input Jacks
Line-Level & HP Analog Output
– Stereo Headphone Out Jack
– RCA Audio Jacks for Headphone and Line
Outputs
S/PDIF Interface
– CS8416 Digital Audio Receiver
– CS8406 Digital Audio Transmitter
I/O Stake Headers and SMA Connectors
– External I2C ? Control Port Accessibility
– External DSP Serial Audio I/O Accessibility
– Direct DSP Serial Audio I/O accessibility
with CS42L55 through SMA connectors
Multiple Power Supply options via USB, Battery
or External Power Supplies
1.65 V to 3.3 V Logic Interface
FlexGUI S/W Control - Windows ? Compatible
– Pre-defined & User-configurable Scripts
Description
The CDB42L55 is the ideal evaluation platform solution to test
and evaluate the CS42L55.The CS42L55 is a highly integrat-
ed, 24-bit, ultra-low-power stereo CODEC based on multi-bit
Delta-Sigma modulation suitable for low-power portable sys-
tem applications. Use of the board requires an analog or digi-
tal signal source, an analyzer, and power supplies. A
Windows PC-compatible computer is also needed in order to
configure the CS42L55 and the board.
System timing can be provided by the CS8416 S/PDIF Re-
ceiver, by the CS42L55 supplied with a master clock, or via an
I/O stake header with a DSP connected.
RCA connectors are provided for CS42L55 analog inputs and
HP/Line outputs. A 1/8 inch audio jack is provided for head-
phone stereo out. Digital I/O connections are available via
RCA phono or optical connectors to the CS8416 and CS8406
(S/PDIF Rx and Tx).
The CDB42L55 is programmed via the PC’s USB using Cirrus
Logic’s Microsoft ? Windows ? -based FlexGUI software. The
evaluation board may also be configured to accept external
timing and data signals for operation in a user application dur-
ing system development.
Ordering Information
CDB42L55
Evaluation Board
PC Control
Board Power
External 5.0 V
CODEC Power
Serial
Supply
LDO
3.3 V
LDO’s 1.8 V
2.5 V
3.3 V (VL only)
VL, VCP, VLDO, VA
MUX
1.8 V
Buck
x3
AAA Alkaline
(not included)
USB
I2C for all
applicable
devices
24 MHz
Oscillator
Circuit Break for
Stereo
PLL
External System
Input 1
S/PDIF Rx
FPGA
Clock/Data Routing
Clock dividers and PLL used
Interface
PCM
Clocks/Data
CS42L55
Stereo
Input 2
to derive all applicable Fs
S/PDIF Tx
from 24 MHz oscillator
Tri-state
I2C Clocks/
Data
Buffers
SRC (Tx)
I/O Stake Headers for Audio
Precision’s Programmable Serial
SRC (Rx)
I/O SMA Connectors
for External System
Interface
HP
Jack
Stereo HP
Output
Stereo Line
Output
Interface Adapter (PSIA)
Copyright ? Cirrus Logic, Inc. 2008
(All Rights Reserved)
DEC '08
DS773DB1
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